Lauterbach and Kernkonzept present Arm Cortex-R82AE Hypervisor Solution Graphic: doraclub/123rf Lauterbach and Kernkonzept were the first to develop a hypervisor solution for the Arm® Cortex®-R82AE CPU that gives developers of Software Defined Vehicle (SDV) architectures insight into the full SDV software stack and enables them to start software development before corresponding System-on-a-Chip (SoCs) […]
Read MoreSpeeding up Safety Certifications with Code Coverage Based on TRACE32® and the LDRA Tool Suite Code coverage measurement is a requirement for safety certification to evaluate the completeness of test cases and demonstrate that there is no unintended functionality. A typical challenge for measuring code coverage is the potential impact on real-time behavior […]
Read MoreLauterbach and Kernkonzept enable Virtualized RISC-V Systems Graphic: wirestock/123rf As the industry’s first supplier, Lauterbach and Kernkonzept enable architects of virtualized software systems to start development and testing on future RISC-V platforms even before corresponding System-on-Chips (SoCs) are available in silicon. To execute mixed-critical workloads with different security levels on a high-performance processor, […]
Read MoreDebug and Trace Support for Synopsys ARC-V Processor IP Graphic: phaisarnwong/123rf Lauterbach extends their industry leading TRACE32® debug and trace tools to include support for Synopsys’ RISC-V instruction set based ARC-V™ processor IP. This support includes full debug and trace of the ARC-V processor IP, including those on vendor-specific hardware implementations, support for virtual […]
Read MoreDebug and Trace Support for Renesas 32-bit-RISC-V Microcontrollers Graphic: Aandriiborodai/123rf Lauterbach´s TRACE32® development tools now support Renesas´ first 32-bit RISC-V® general-purpose Microcontroller group for cost-sensitive and low-power embedded applications. TRACE32® tools support includes debugging of the RISC-V processor core as well as read and write access to the chip’s internal flash memory. The new R9A02G021 microcontroller (MCU) features a power-efficient […]
Read MoreHow to efficiently debug complex RISC-V based chips? At the amazing RISC-V Summit Europe end of June, Lauterbach’s system engineer and specialist Michael Schleinkofer gave a talk on how to efficiently debug heterogeneous RISC-V based chips. Thanks to the recording by RISC-V International, everyone can now benefit from Michael’s presentation. HERE Related to this topic, […]
Read MoreTRACE32® from Lauterbach supports Microchip’s PIC64GX RISC-V® MPUs Lauterbach’s TRACE32® development tools now support Microchip’s 64-bit RISC-V® PIC64GX microprocessor family for power-efficient embedded-compute platforms. TRACE32® tools support includes simultaneous debugging of the RISC-V processor cores as well as non-intrusive processor trace capture. Microchip’s PIC64GX series includes four SiFive RISC-V U54 64-bit CPU cores […]
Read MoreDebug and Trace Support for NXP S32N55 Vehicle Processor Graphic: nartawut/123rf Lauterbach’s TRACE32® development tools now support NXP® Semiconductors’ S32N55 vehicle super-integration processor for consolidation of real-time vehicle functions in software-defined vehicle (SDV) architectures. TRACE32® tools support includes simultaneous debugging of the processor cores as well as non-intrusive processor trace capture. The S32N55 […]
Read MoreLauterbach´s TRACE32® development tools now also support all Arm’s leading-edge Armv9-A server processors: Arm® Neoverse™ V2, Arm® Neoverse™ N2 and Arm® Neoverse™ E2. TRACE32® support includes simultaneous debugging of the CPU cores as well as non-intrusive CPU trace capture. Graphic: Denys_Bilytskyi/123rf While the Arm® Neoverse™ V2 CPU is designed for cloud computing, high-performance […]
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